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Boots up fine off a USB port. Preloaded demo design has a blinky.

Probably gonna be too busy tonight to do much with it but I'll try and run my blinky soon.

@azonenberg fpga?

@aeva Yep! Itty bitty one - 19.7K logic elements, 1 Mbit of internal RAM, 36 multipliers, 195 GPIOs (up to 230 in larger packages than the one on here), 5 PLLs, a handful of LVDS lanes. Some versions have MIPI D-PHY but not this package.

Best part is it's only $11.59 in single units at digikey.

Compare this to the Xilinx XC7S15 which is 12.8K LEs, 360 Kbits RAM, 20 multipliers, 100 GPIOs, 4 PLLs... And starts at $21.69. The next model up, the XC7S25, starts at $37.

The Xilinx is a 28nm part and this is a 40 so it's probably not quite as fast, but the bang-for-buck is definitely higher.

@aeva I've generally not been thrilled with the long term trajectory Xilinx is taking as a company especially since being bought by AMD, and am starting to look at alternatives.

I'm still going to be doing plenty of Xilinx designs in the near term since I have a lot of parts in inventory, but I want to kinda explore and see what's out there.

The tooling for their higher end parts with gigabit transceivers and such (Titanium and Topaz) seem like they aren't quite ready for prime time in terms of feature set, but for simpler parts like this I have reasonably high hopes in the nearer term.

@SDRHoernchen I got this particular part mostly just as a low cost intro to the Efinix toolchain and workflows.

My *actual* interest is more along the lines of the Titanium Ti375 and up (the parts with RISC-V and SERDES).

But I'm sure I could find a use for Trions for IO expansion etc somewhere.

@tj @SDRHoernchen they're physical silicon CPUs that can clock up to like a GHz, as opposed to the smaller parts where you can generate a riscv as a soft IP block using FPGA LUTs but it'll eat into your logic capacity and run much slower

@tj @SDRHoernchen Hard as opposed to soft, meaning it's physical silicon not running in FPGA LUTs.