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@azonenberg say, what was the page switching protocol you've encountered with PHYs before? reg 0xD/0xE appears to be 802.3 standard
@whitequark IEEE standard:
* Well defined registers from 0x00 to 0a and 0f
* 0b/0c reserved
* 0d/0e used for indirect access to MMD registers
* Vendor specific registers from 10 to 1f
MMD registers: entirely vendor defined IIRC
@whitequark What the VSC8512 does is:
* Registers 0x00 - 0f: standard
* Register 0x10 - 0x1e: vendor specific paged
* Register 0x1f: page selector
@whitequark Interestingly, they use the IEEE standard MMD indirect access feature to access their vendor specific registers *for EEE mode config only*.
But all other vendor specific registers they use their homebrew paging scheme
@azonenberg oh i've seen this on a realtek device
@whitequark the 1f page selector, the cursed mix of two different register access schemes, both?