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@whitequark This peripheral has been nothing but pain and I feel sorry for anyone who tried to use it for an external *memory* chip as a lot of these quirks are a lot more significant if you don't have complete control of the register map.
I'm told there's all kinds of other footguns around things like trying to execute from it (e.g. if your interrupt vector table, stack pointer, and instruction pointer are all in the OCTOSPI memory address range some interrupts can cause a hard lock of the AXI bus) etc.
But in my limited case of using it to memory map SFRs on an FPGA, I think I can shoehorn it into working in a manner that is still slightly less painful than using indirect mode (i.e. maintains a reasonable level of driver code compatibility with code written for less cursed platforms).
@whitequark I actually quite like the STM32H7 overall, it's just been this one peripheral giving me trouble. Which is why I switched to the far more performant and less buggy parallel memory controller (the FMC) for future designs.
But that doesn't change the fact that I have >$2K of hardware on my bench next to me for a one-off project that I need to get working., and I want its firmware stack to diverge as little as possible from code written for future platforms as possible to ensure maintainability.