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#riscv

39 posts15 participants2 posts today
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"Projekty Antmicro wykorzystują technologie open source i open hardware takie jak RISC-V, Renode, Zephyr, TensorFlow, ROS 2, Linux czy Android. Antmicro ma status Platinum Founding Member w RISC-V Foundation, jest również członkiem Linux Foundation i Zephyr Project."

Bardzo dziękujemy za wsparcie i zaufanie!

Do zobaczenia 7 czerwca w Poznaniu!

🗓️ Agenda: piwo.sh

piwo.shPoznańska Impreza Wolnego Oprogramowania (P.I.W.O.)

A couple of worthwhile #RISCV talks from the recent RISC-V Summit in Paris:
- Mark Haytor from #Rivos on future RISC-V platforms - servers in particular: "The significance of RVA23" : youtube.com/watch?v=VJ2bkXZ5Co
- #Scaleway's Fabien Piuzzi on the challenges of "Cloud-base RISC-V servers" from #Scaleway youtube.com/watch?v=pD6fiUuRDo

So, I’m not a programmer, I can usually hack things to make them work.
But, I’m stuck so I’m asking for advise please.
I’m using windows (not for much longer) and I’ve got a neorisc-v onto my Alchitry au board (it gets to the bootloader) but I can’t seem to compile any of the examples. I found a prebuilt windows compiler (.zip) but I’m lost what to do next. Can anyone help?
#riscv #fpga

A couple of days ago a new release 6.14 of KDE Frameworks came out and part of it is the syntax highlighting engine, used not only by KDE applications like Kate and KDevelop; but also by some others like Qt Creator.

I'm happy to report that this version also brings support for RISC-V instructions/registers/… in GNU Assembler, that I contributed:
🔗 invent.kde.org/frameworks/synt

#RISCV #RISC_V #assembler #assembly #programming #Kate #editor #KDevelop #QtCreator #Qt6 #IDE #KDE #KDEFrameworks @kde

I finally got all my #RetroComputing development tools to compile for #RISCV, 3 of them were originally broken.

Usptream maintainers have already fixed 2 of them, and I've just filed a bug report for the last one.

RISC-V under qemu on my 13900K is about fast enough to emulate an Amstrad CPC at half speed. Hopefully I can get real hardware soon and get better performance. Ubuntu 25.10 is a few months away :)

I'm considering #RISCV CPUs. I'm looking for open source RV32IMC with good debugging support and interrupts. Simplicity is more important than performance. I prefer Verilog. VexRiscv is an old favourite and Hazard3 is an interesting new option. What else should I consider? #FPGA

I managed to run GNU Guix from eMMC on VisionFive2 board.

The image is built from "gnu/system/images/visionfive2.scm" manifest and is written to an eMMC with "ddrescue".

Also I had to switch the boot mode into QSPI and run those command on boot:

setenv fdtfile starfive/jh7110-starfive-visionfive-2-v1.3b.dtb
saveenv

It runs but the boot process stops with "failed to resolve partition" error.